Title :
Clocking schemes for switched-capacitor FIR decimators
Author :
Betts, A.K. ; Taylor, J.T. ; Haigh, D.G.
Author_Institution :
University College London, Department of Electronic & Electrical Engineering, London, UK
Abstract :
Formulas are presented to aid the analysis of clocking schemes for FIR switched-capacitor decimators. As an example, they are applied to an existing circuit, and alternative schemes are developed to allow longer operationalamplifier settling times.
Keywords :
switched capacitor filters; FIR switched-capacitor decimators; clocking schemes; operational-amplifier settling times; switched capacitor filters;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19870915
