DocumentCode :
1038419
Title :
Multiplication in collector junctions of silicon n-p-n and p-n-p transistors
Author :
Moll, John L. ; Su, James L. ; Wang, A.C.
Author_Institution :
Fairchild Semiconductors, Mountain View, Calif.
Volume :
17
Issue :
5
fYear :
1970
fDate :
5/1/1970 12:00:00 AM
Firstpage :
420
Lastpage :
423
Abstract :
The values 1-1/ M for both electrons and holes, where M is the multiplication factor, have been calculated in three different silicon p-n junctions. The logarithmic plot of 1 - 1/ M versus the normalized voltage V/V_{B} is well approximated by a straight line for 0.1 > 1 -1/ M > 0.005. This range corresponds to the useful range of α0for most bipolar transistors. An empirical expression has been obtained for the ratio V_{CEO}/V_{CBO} within this range.
Keywords :
Capacitance; Charge carrier processes; Germanium; Heterojunctions; Ionization; P-n junctions; PIN photodiodes; Semiconductor diodes; Silicon; Voltage;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/T-ED.1970.16999
Filename :
1476183
Link To Document :
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