DocumentCode :
1039657
Title :
Design, manufacture and evaluation of a scalable high-performance neural system
Author :
Bolouri, H. ; Morgan, P. ; Gurney, K.
Author_Institution :
Eng. Res. & Dev. Centre, Hertfordshire Univ., Hatfield
Volume :
30
Issue :
5
fYear :
1994
fDate :
3/3/1994 12:00:00 AM
Firstpage :
426
Lastpage :
427
Abstract :
The authors describe a scalable neural system, HyperNet, based on a probabilistic RAM-based architecture and using a custom VLSI IC. A system using five HyperNet VLSI ICs and capable of realising up to 10240 neurons has been designed, manufactured and demonstrated to have the potential to learn more than three orders of magnitude faster than simulations on current workstations
Keywords :
CMOS integrated circuits; VLSI; application specific integrated circuits; neural chips; performance evaluation; random-access storage; HyperNet; custom VLSI IC; probabilistic RAM-based architecture; scalable neural system;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:19940283
Filename :
273253
Link To Document :
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