Title :
A high speed image codec VLSI for document retrieval
Author :
Sato, Fumitaka ; Murayama, Masayoshi ; Sumita, Shigekazu ; Adachi, Kensuke
Author_Institution :
Toshiba Corp., Ome, Japan
fDate :
10/1/1989 12:00:00 AM
Abstract :
A new high-speed expansion scheme for binary image data compressed using the MMR code is presented. The proposed scheme enables the output image data to flow at nearly the maximum data flow rate of 1 byte per machine cycle, even for a rather complicated image, such as CCITT reference document No. 4. A key to this performance is the proposed concept of parallel image streaming combined with bit-parallel, concurrent decoding of the next codeword. Based on these concepts, a VLSI chip was designed, fabricated, and evaluated. The effectiveness of the scheme is evidenced by the fact that any of the CCITT reference documents are expanded in 0.11 to 0.13 s
Keywords :
CMOS integrated circuits; VLSI; codecs; computerised picture processing; data communication equipment; data compression; decoding; encoding; information retrieval; logic arrays; parallel processing; pipeline processing; visual communication; CCITT reference documents; HC2MOS technology; MMR code; PICODEC; Toshiba TC110G series gate array; VLSI chip; binary image data; bit-parallel concurrent decoding; data compression; document retrieval; high-speed expansion scheme; image codec VLSI; parallel image streaming; Codecs; Communication systems; Decoding; Facsimile; Image coding; Image retrieval; Image storage; Information retrieval; Streaming media; Very large scale integration;
Journal_Title :
Circuits and Systems, IEEE Transactions on
