DocumentCode :
1040335
Title :
Partial-switching two-core-per-bit memory design considerations
Author :
Van Bruck, H.
Author_Institution :
N. V. Philips, Eindhoven, Netherlands
Volume :
5
Issue :
3
fYear :
1969
fDate :
9/1/1969 12:00:00 AM
Firstpage :
585
Lastpage :
585
fLanguage :
English
Journal_Title :
Magnetics, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9464
Type :
jour
DOI :
10.1109/TMAG.1969.1066528
Filename :
1066528
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=1040335
