Title :
On-chip digital jitter measurement, from megahertz to gigahertz
Author :
Sunter, Stephen ; Roy, Aubin
Abstract :
One of the challenges of testing at multiGbps rates is jitter characterization. We introduce a new technique that allows for attaining on-chip measurements at a substantial level of accuracy. We propose new algorithms that allow a wide frequency range, supporting the desired accuracy while guaranteeing signal integrity and low overhead. One advantage of this approach is that we can reliably simulate it with a logic simulator, and the results at one frequency are indicative of the results at any frequency.
Keywords :
digital integrated circuits; error statistics; logic testing; phase locked loops; system-on-chip; timing circuits; timing jitter; digital integrated circuits; logic simulator; multiGbps rates; on-chip digital jitter measurement; signal integrity; wide frequency range; Built-in self-test; Delay lines; Frequency measurement; Phase locked loops; Phase measurement; Position measurement; Production; Testing; Time measurement; Timing jitter;
Journal_Title :
Design & Test of Computers, IEEE
DOI :
10.1109/MDT.2004.38
