Single-word multiple-bit upsets in static random access devices

Presents the results of an investigation of the SMU (single-word multiple-bit upset) vulnerability of a number of high density SRAM (static random-access memory) device types. The primary objectives of this study were to examine the extent of SMUs in SRAMs, determine design characteristics that predispose devices to this type of upset, and investigate SMU mitigation techniques applicable to space-based electronic systems. The results reported suggest that a nonnegligible SMU rate can be expected for most high-density SRAM types when exposed to the space radiation environment. However, the range of SMU rates is also very large, suggesting that careful selection of device types should be emphasized during the design phase. Furthermore, susceptibility to SEU is not necessarily a reliable indicator of SMU vulnerability. A more important determinant, in many cases, is the architecture of the device, especially the physical separation between logically adjacent cells. It is therefore inappropriate to consider SEU (single event upset) studies to be a proxy for SMU investigations