Dependence of the SEU window of vulnerability of a logic circuit on magnitude of deposited charge

A pulsed picosecond laser was used to measure the time during which gates in a GaAs logic circuit were sensitive to single event upset (SEU). Circuit analysis showed that those gates would be most sensitive if the laser light arrived just prior to the clock signal going from low to high voltage. By delaying the clock signal with respect to the arrival time of the laser pulse, it was possible to measure a window of vulnerability, which is the time interval prior to the arrival of the clock signal during which the gate is sensitive to upsets. The width of that window was found to depend on the energy of the light pulse. Similar behavior is expected when the circuit is exposed to ions. These results suggest that, at high frequencies and in the presence of ions and with large LETs (linear energy transfers) gates in logic circuits may be sensitive to upsets during a large fraction of their duty cycle. The technique described provides an in situ way of measuring charge collection times at individual transistors and signal propagation times between logic gates using the circuit itself as the detector