• DocumentCode
    1042814
  • Title

    Fine pitch TAB assembly technology for 820 pin count ceramic PGA using single point bonding technology at room temperature

  • Author

    Ando, Tetsuo ; Tomioka, Taizo ; Nakazono, Masakazu ; Atsumi, Koichiro ; Tane, Yasuo ; Nakano, Jiro ; Hirata, Seiichi

  • Author_Institution
    Manuf. Eng. Res. Center, Toshiba Corp., Yokohama, Japan
  • Volume
    16
  • Issue
    8
  • fYear
    1993
  • fDate
    12/1/1993 12:00:00 AM
  • Firstpage
    808
  • Lastpage
    816
  • Abstract
    A ceramic pin grid array (PGA) package for industrial computers has been developed by applying tape automated bonding (TAB) technology to one of the largest (20×20 mm) and highest pin count (820 pins) application-specific integrated circuits (ASICs) available in the semiconductor industry. To fabricate this package, a series of TAB assembly processes containing inner lead bonding (ILB), cutting and forming of TAB outer leads, solder sheet mounting, outer lead bonding (OLB), die attachment and lid sealing have been developed. To realize single-point TAB technology, the optimum design for a tape carrier and for electrode pad patterns on a ceramic substrate has been explored, a new bonding tool has been developed, and the optimum thickness of gold, plated on the electrode pads on the ceramic substrate, has been investigated. As a result of these investigations, outer lead bond strengths exceeding 30 gf and bonding accuracy within ±10 μm have been achieved. Degradation of bond strength by thermal cycle tests was not observed
  • Keywords
    application specific integrated circuits; ceramics; gold; integrated circuit technology; large scale integration; seals (stoppers); soldering; tape automated bonding; 20 mm; 820 pin count; ASIC; Au; ILB; OLB; application-specific integrated circuit; bonding tool; ceramic PGA; ceramic substrate; die attachment; electrode pad patterns; fine pitch TAB assembly technology; industrial computers; inner lead bonding; lid sealing; microassembly; outer lead bonding; pin grid array package; room temperature; single point bonding technology; solder sheet mounting; tape automated bonding; tape carrier; Assembly; Bonding; Ceramics; Electrodes; Electronics packaging; Integrated circuit packaging; Integrated circuit technology; Lead; Semiconductor device packaging; Substrates;
  • fLanguage
    English
  • Journal_Title
    Components, Hybrids, and Manufacturing Technology, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0148-6411
  • Type

    jour

  • DOI
    10.1109/33.273678
  • Filename
    273678