DocumentCode :
1042938
Title :
Reducing the Number of Comparators in Multibt \\Delta \\Sigma Modulators
Author :
Pesenti, Sergio ; Clément, Patrick ; Kayal, Maher
Author_Institution :
Marvell Switzerland Sari, Etoy
Volume :
55
Issue :
4
fYear :
2008
fDate :
5/1/2008 12:00:00 AM
Firstpage :
1011
Lastpage :
1022
Abstract :
Multibit feedback, being one way of lowering DeltaSigma modulators power consumption, has a major obstacle: the number of components in the internal analog-to-digital converter (ADC) and digital-to-analog converter (DAC). Nevertheless, the number of comparators in the ADC can be significantly reduced depending on the order of noise-shaping and the oversampling ratio. In this paper, we propose an auto-ranging algorithm with a mechanism to keep the structure stable that emulates more quantization levels than that allowed by the number of comparators. As the recourse to segmented DACs allows lowering the complexity of the mismatch shaping encoder, the auto-ranging ADC brings the benefits of multibit feedback without the usual increase in size and power consumption. The internal number of bits in DeltaSigma modulators is no more restricted by the difficulty of building the flash ADC with a low voltage supply.
Keywords :
comparators (circuits); delta-sigma modulation; quantisation (signal); analog-to-digital converter; autoranging algorithm; comparators; digital-to-analog converter; multibit DeltaSigma modulators; multibit feedback; oversampling ratio; quantization levels; Adaptive algorithm; DEM; adaptive algorithm; auto-ranging; delta-sigma; delta-sigma ($DeltaSigma$ ); dynamic element matching (DEM); low voltage; low-voltage; multi-bit; multibit;
fLanguage :
English
Journal_Title :
Circuits and Systems I: Regular Papers, IEEE Transactions on
Publisher :
ieee
ISSN :
1549-8328
Type :
jour
DOI :
10.1109/TCSI.2008.916531
Filename :
4436021
Link To Document :
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