High-performance ultralow-temperature polycrystalline silicon TFT using sequential lateral solidification

This letter presents technologies to fabricate ultralow-temperature (< 150 °C) polycrystalline silicon thin-film transistor (ULTPS TFT). Sequential lateral solidification is used for crystallization of RF magnetron sputter deposited amorphous silicon films resulting in a high mobility polycrystalline silicon (poly-Si) film. The gate dielectric is composed of plasma oxidation and Al₂O₃ grown by plasma-enhanced atomic layer deposition. The breakdown field on the poly-Si film was above 6.3 MV/cm. The fabricated ULTPS TFT showed excellent performance with mobility of 114 cm²/V · s (nMOS) and 42 cm²/V · s (pMOS), on/off current ratio of 4.20 × 10⁶ (nMOS) and 5.7 × 10⁵ (pMOS), small V_th of 2.6 V (nMOS) and -3.7 V (pMOS), and swing of 0.73 V/dec (nMOS) and 0.83 V/dec (pMOS).