Title :
A dual-metal gate integration process for CMOS with sub-1-nm EOT HfO2 by using HfN replacement gate
Author :
Ren, C. ; Yu, H.Y. ; Kang, J.F. ; Wang, X.P. ; Ma, H.H.H. ; Yeo, Yee-Chia ; Chan, Daniel S H ; Li, M.-F. ; Kwong, D.L.
Author_Institution :
Dept. of Electr. & Comput. Eng., Nat. Univ. of Singapore, Singapore
Abstract :
A replacement gate process employing a HfN dummy gate and sub-1-nm equivalent oxide thickness (EOT) HfO2 gate dielectric is demonstrated. The excellent thermal stability of the HfN-HfO2 gate stack enables its use in high temperature CMOS processes. The replacement of HfN with other metal gate materials with work functions adequate for n- and pMOS is facilitated by a high etch selectivity of HfN with respect to HfO2, without any degradation to the EOT, gate leakage, or time-dependent dielectric breakdown characteristics of HfO2. By replacing the HfN dummy gate with Ta and Ni in nMOS and pMOS devices, respectively, a work function difference of ∼0.8 eV between nMOS and pMOS gate electrodes is achieved. This process could be applicable to sub-50-nm CMOS technology employing ultrathin HfO2 gate dielectric.
Keywords :
CMOS integrated circuits; hafnium compounds; nickel; tantalum; thermal stability; 1 nm; 50 nm; CMOS technology; HfN-HfO2; Ni; Ta; dual-metal gate integration; dummy gate; equivalent oxide thickness; gate leakage; gate stack; high etch selectivity; high temperature CMOS processes; nMOS devices; nMOS gate electrodes; pMOS devices; pMOS gate electrodes; replacement gate; thermal stability; time-dependent dielectric breakdown characteristics; ultrathin gate dielectric; CMOS process; CMOS technology; Degradation; Dielectric materials; Etching; Hafnium oxide; Inorganic materials; MOS devices; Temperature; Thermal stability; CMOS; HfN; dual-metal gate; integration; replacement gate;
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2004.832535
