Low-power pipeline ADC for wireless LANs

Author

Arias, J. ; Boccuzzi, V. ; Quintanilla, L. ; Enríquez, L. ; Bisbal, D. ; Banu, M. ; Barbolla, J.

Author_Institution

Dept. de Electr. y Electron., Univ. de Valladolid, Spain

Volume

39

Issue

8

fYear

2004

Firstpage

1338

Lastpage

1340

Abstract

In this paper, a 10-bit 40-MS/s analog-to-digital converter (ADC) is presented. A power consumption of 12 mW was achieved by using a time-interleaved and pipelined architecture with shared operational amplifiers. This circuit was fabricated in a 2.5-V 0.25-μm technology with metal-oxide-metal capacitors. Experimental results are within design ranges and are in good agreement with simulation data. It turns out that the proposed Nyquist-rate ADC provides a potential solution for low-power high-speed applications, e.g., wireless LANs.

Keywords

analogue-digital conversion; low-power electronics; pipeline arithmetic; switched capacitor networks; wireless LAN; 0.25 micron; 10 bits; 12 mW; 2.5 V; Nyquist-rate ADC; analog-to-digital converter; data converter; low-power pipeline ADC; metal-oxide-metal capacitors; pipelined architecture; power consumption; shared operational amplifiers; switched capacitor; time-interleaved architecture; wireless LAN; CMOS technology; Capacitors; Circuits; Energy consumption; Local area networks; Operational amplifiers; Pipelines; Sampling methods; Voltage; Wireless LAN; CMOS; data converter; low power; pipelined ADC; switched capacitor; time-interleaved;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.2004.831477

Filename

1317059