DocumentCode
1044092
Title
16*16 bit parallel multiplier based on 6 K gate array with 0.3 mu m AlGaAs/GaAs quantum well transistors
Author
Thiede, A. ; Berroth, Manfred ; Hurm, V. ; Nowotny, U. ; Gotzeina, W. ; Sedler, M. ; Raynor, B. ; Koehler, Katrina ; Hofmann, P. ; Huelsmann, A. ; Kaufel, G. ; Schneider, Jurgen
Author_Institution
Fraunhofer Inst. for Appl. Solid State Phys., Freiburg, Germany
Volume
28
Issue
11
fYear
1992
fDate
5/21/1992 12:00:00 AM
Firstpage
1005
Lastpage
1007
Abstract
The design and performance of a 16*16 bit parallel multiplier based on a 6 K gate array will be presented. This LSI semicustom IC demonstrates the high potential of the authors´ AlGaAs/GaAs quantum well FETs with a gate length of 0.3 mu m. The best multiplication time measured was 7.2 ns.
Keywords
III-V semiconductors; aluminium compounds; application specific integrated circuits; field effect integrated circuits; gallium arsenide; large scale integration; logic arrays; multiplying circuits; 0.3 micron; 16 bit; 7.2 ns; AlGaAs-GaAs; LSI; design; gate array; gate length; multiplication time; parallel multiplier; performance; quantum well transistors; semiconductors; semicustom IC;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19920639
Filename
274689
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