• DocumentCode
    1044094
  • Title

    Ion implantation combined with silicon-gate technology

  • Author

    Mai, C.C. ; Hswe, M. ; Palmer, R.B.

  • Author_Institution
    Mostek Corporation, Worcester, Mass.
  • Volume
    19
  • Issue
    11
  • fYear
    1972
  • fDate
    11/1/1972 12:00:00 AM
  • Firstpage
    1219
  • Lastpage
    1221
  • Abstract
    Ion implantation has been combined with silicon-gate technology for the fabrication of MOS integrated circuits that possess the principal advantages afforded by each technique. This process is essentially a standard silicon-gate process to which a single masking step and an ion-implantation step have been added in order to provide the depletion-mode devices.
  • Keywords
    Annealing; FETs; Fabrication; Integrated circuit technology; Ion implantation; MOS integrated circuits; MOSFETs; Resists; Silicon; Threshold voltage;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/T-ED.1972.17577
  • Filename
    1477048
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1044094