Title :
An On-the-Fly Parameter Dimension Reduction Approach to Fast Second-Order Statistical Static Timing Analysis
Author :
Feng, Zhuo ; Li, Peng ; Zhan, Yaping
Author_Institution :
Dept. of Electr. & Comput. Eng, Texas A&M Univ., College Station, TX
Abstract :
While first-order statistical static timing analysis (SSTA) techniques enjoy good runtime efficiency desired for tackling large industrial designs, more accurate second-order SSTA techniques have been proposed to improve the analysis accuracy, but at the cost of high computational complexity. Although many sources of variations may impact the circuit performance, considering a large number of inter- and intra-die variations in the traditional SSTA is very challenging. In this paper, we address the analysis complexity brought by high parameter dimensionality in SSTA and propose an accurate yet fast second-order SSTA algorithm based on novel on-the-fly parameter dimension reduction techniques. By developing a reduced rank regression (RRR)-based approach and a method of moments (MOM)-based parameter reduction algorithm within the block-based SSTA flow, we demonstrate that accurate second-order SSTA can be extended to a much higher parameter dimensionality than what is possible before. Our experimental results have shown that the proposed parameter reductions can achieve up to 10times parameter dimension reduction and lead to significantly improved second-order SSTA under a large set of process variations.
Keywords :
method of moments; network analysis; regression analysis; timing; circuit performance; computational complexity; method of moments; on-the-fly parameter dimension reduction approach; parameter dimensionality; parameter reduction algorithm; reduced rank regression; runtime efficiency; second-order statistical static timing analysis; Algorithm design and analysis; Circuit optimization; Computational complexity; Computational efficiency; Computer industry; Linear approximation; Performance analysis; Principal component analysis; Runtime; Timing; Reduced rank regression; statistical parameter dimension reduction; statistical static timing analysis;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
DOI :
10.1109/TCAD.2009.2009148