DocumentCode :
1044675
Title :
Elimination of chuck-related parasitics in MOSFET gate capacitance measurements
Author :
Kraus, Philip A. ; Ahmed, Khaled Z. ; Williamson, John S., Jr.
Author_Institution :
Front End Products Group, Appl. Mater. Inc., Santa Clara, CA, USA
Volume :
51
Issue :
8
fYear :
2004
Firstpage :
1350
Lastpage :
1352
Abstract :
We report the observation of frequency dispersion in the measured gate capacitance of nMOS transistors with a 2.2-nm SiO2 gate dielectric, and a practical arrangement for eliminating this dispersion from the measurement. The anomalous dispersion is due to a parasitic reactive path to ground through the wafer chuck of the measurement apparatus. A circuit model for the device and apparatus results in an adequate description of the dispersion. Consistent with this model, we demonstrate the elimination of the dispersion by removing the parasitic path to ground through making appropriate connections from the capacitance meter to the chuck. The improved measurement arrangement results in less than 0.1% dispersion in the measured accumulation capacitance from 10 kHz to 1 MHz.
Keywords :
MOSFET; capacitance measurement; semiconductor device measurement; semiconductor device models; silicon compounds; 0.01 to 1 MHz; 2.2 nm; MOSFET gate capacitance measurements; Si devices; SiO2; SiO2 gate dielectric; capacitance meter; chuck-related parasitics elimination; circuit model; dispersion elimination; frequency dispersion; nMOS transistors; parasitic reactive path; wafer chuck; Capacitance measurement; Current measurement; Dielectric measurements; Dispersion; Frequency measurement; Leakage current; MOS devices; MOSFET circuits; Parasitic capacitance; Semiconductor device modeling; Gate capacitance; MOSFET; Si devices;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/TED.2004.832705
Filename :
1317161
Link To Document :
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