• DocumentCode
    104481
  • Title

    On Optimal Kernel Size for Integrated CPU-GPUs — A Case Study

  • Author

    Nandakumar, Vivek S. ; Marek-Sadowska, Malgorzata

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Univ. of California, Santa Barbara, Santa Barbara, CA, USA
  • Volume
    13
  • Issue
    2
  • fYear
    2014
  • fDate
    July-Dec. 28 2014
  • Firstpage
    81
  • Lastpage
    84
  • Abstract
    Integrated CPU-GPU architectures with a fully addressable shared memory completely eliminate any CPU-GPU data transfer overhead. Since such architectures are relatively new, it is unclear what level of interaction between the CPU and GPU attains the best energy efficiency. Too coarse grained or larger kernels with fairly low CPU - GPU interaction could cause poor utilization of the shared resources while too fine grained kernels could cause frequent interrupts of GPU computation and performance degradation. Also larger kernels require larger shared resources causing increase in area and parasitics which affect the latency sensitive CPU cores. In this paper, we show the effect of granularity on the overall system´s energy efficiency using a synthetic workload. We describe how our framework models a truly unified shared memory in integrated architectures with frequent CPU - GPU communication.
  • Keywords
    graphics processing units; performance evaluation; power aware computing; shared memory systems; CPU-GPU communication; CPU-GPU data transfer overhead; CPU-GPU interaction; GPU computation; energy efficiency; fine grained kernels; fully addressable shared memory; integrated CPU-GPU architectures; latency sensitive CPU cores; optimal kernel size; overall system energy efficiency; performance degradation; Central Processing Unit; Computational modeling; Energy efficiency; Graphics processing units; Memory management; B.3.2.g Shared memory; B.4.4.b Simulation; B.9.2 Energy-aware systems; C.1.3.f Heterogeneous (hybrid) systems; C.4.g Measurement; D.4.4 Communications Management; evaluation; modeling; simulation of multiple-processor systems;
  • fLanguage
    English
  • Journal_Title
    Computer Architecture Letters
  • Publisher
    ieee
  • ISSN
    1556-6056
  • Type

    jour

  • DOI
    10.1109/L-CA.2013.27
  • Filename
    6671573