Title :
A Built-In Self-Test (BIST) Technique for Single-Event Testing in Digital Circuits
Author :
Balasubramanian, Anitha ; Bhuva, B.L. ; Massengill, L.W. ; Narasimham, B. ; Shuler, R.L. ; Loveless, T.D. ; Holman, W. Timothy
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Vanderbilt Univ., Nashville, TN
Abstract :
A built-in self-test technique for testing digital logic circuits for single-events has been developed. The BIST technique can be used for single-event testing in any conventional laboratory to evaluate the circuit level response to SEs. Experimental and simulation results for multiple technology nodes show the feasibility of this approach to test circuits, with the added advantages of reduced testing time and cost.
Keywords :
built-in self test; logic testing; BIST technique; built-in self-test technique; digital logic circuits; single-event testing; Automatic testing; Built-in self-test; Circuit testing; Costs; Digital circuits; Error analysis; Frequency; Logic testing; Pulse circuits; Space vector pulse width modulation; Current-starved inverters; digital circuits; random number generator; single-event transients; single-events;
Journal_Title :
Nuclear Science, IEEE Transactions on
DOI :
10.1109/TNS.2008.2006499
