Title :
Design Implications of Single Event Transients in a Commercial 45 nm SOI Device Technology
Author :
Kleinosowski, AJ ; Cannon, Ethan H. ; Pellish, Jonathan A. ; Oldiges, Phil ; Wissel, Larry
Author_Institution :
Boeing Co., Seattle, WA
Abstract :
This paper presents modeling and measurements of single event transients in a commercial 45 nm SOI device technology. SETs in clock circuits and pass gates can cause upsets in circuit structures hardened against single event upsets.
Keywords :
semiconductor device measurement; semiconductor device models; silicon-on-insulator; transient analysis; SOI device technology; circuit structures; clock circuits; pass gates; single event transient; size 45 nm; Circuits; Clocks; Flip-flops; Inorganic materials; Logic; Paper technology; Protection; Semiconductor materials; Silicon; Single event upset; Modeling; radiation event; single event transient (SET); single event upset (SEU); soft error;
Journal_Title :
Nuclear Science, IEEE Transactions on
DOI :
10.1109/TNS.2008.2005191
