DocumentCode :
1046115
Title :
Recommended Test Conditions for SEB Evaluation of Planar Power DMOSFETs
Author :
Liu, Sandra ; Titus, Jeffery L. ; DiCienzo, Christopher ; Cao, Huy ; Zafrani, Max ; Boden, Milton ; Berberian, Robert
Author_Institution :
Int. Rectifier Corp., El Segundo, CA
Volume :
55
Issue :
6
fYear :
2008
Firstpage :
3122
Lastpage :
3129
Abstract :
This paper discusses issues concerning single-event burnout (SEB) and single-event gate rupture (SEGR); explains and provides a basic overview of the preferred test conditions and procedures that would yield the most meaningful test results in evaluating power MOSFETs´ SEB susceptibilities, describes how to correctly identify SEB and SEGR failure modes to derive the most feasible failure mechanisms.
Keywords :
power MOSFET; semiconductor device testing; SEB evaluation; planar power DMOSFET; single-event burnout; single-event gate rupture; Cranes; Cyclotrons; Epitaxial layers; Failure analysis; MOSFET circuits; Power MOSFET; Pulp manufacturing; Rectifiers; Testing; Voltage; Heavy ions; power MOSFET; single-event burnout (SEB); single-event gate rupture (SEGR);
fLanguage :
English
Journal_Title :
Nuclear Science, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9499
Type :
jour
DOI :
10.1109/TNS.2008.2006841
Filename :
4723799
Link To Document :
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