• DocumentCode
    1048023
  • Title

    A 20 to 24 GHz + 16.8 dBm Fully Integrated Power Amplifier Using 0.18 \\mu{\\rm m} CMOS Proces

  • Author

    Jen, Yung-Nien ; Tsai, Jeng-Han ; Peng, Chung-Te ; Huang, Tian-Wei

  • Author_Institution
    Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei
  • Volume
    19
  • Issue
    1
  • fYear
    2009
  • Firstpage
    42
  • Lastpage
    44
  • Abstract
    A 20-24 GHz, fully integrated power amplifier (PA) with on-chip input and output matching is realized in 0.18 mum standard CMOS process. By cascading two cascode stages, the PA achieves 15 dB small signal gain, 10.7% power added efficiency, 16.8 dBm output saturation power and high power density per chip area of 0.137 W/mm2, which is believed to be the highest power density to our knowledge. The whole chip area with pads is 0.35 mm2, which is the smallest one compared to all reported paper.
  • Keywords
    CMOS integrated circuits; microwave power amplifiers; CMOS process; efficiency 10.7 percent; frequency 20 GHz to 24 GHz; ful integrated power amplifier; gain 15 dB; on-chip input matching; on-chip output matching; size 0.18 mum; 24 GHz; CMOS; fully integrated; power amplifier (PA);
  • fLanguage
    English
  • Journal_Title
    Microwave and Wireless Components Letters, IEEE
  • Publisher
    ieee
  • ISSN
    1531-1309
  • Type

    jour

  • DOI
    10.1109/LMWC.2008.2008591
  • Filename
    4729652
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1048023