DocumentCode :
1048742
Title :
A Center-Offset Polycrystalline-Silicon Thin-Film Transistor With 
Amorphous-Silicon Contacts
Author :
Oh, J.H. ; Kang, D.H. ; Park, W.H. ; Jang, J. ; Chang, Y.J. ; Choi, J.B. ; Kim, C.W.
Author_Institution :
Dept. of Inf. Display, Kyung Hee Univ., Seoul
Volume :
30
Issue :
1
fYear :
2009
Firstpage :
36
Lastpage :
38
Abstract :
We have studied a bottom-gate polycrystalline-silicon thin-film transistor (poly-Si TFT) with amorphous-silicon (a-Si) n+ contacts and center-offset gated structure, where intrinsic poly-Si is used in the center-offset region. The fabrication process is compatible with the conventional a-Si TFT with addition of thermal annealing for crystallization of a-Si. The bottom-gate poly-Si TFT with a 5-mum offset length exhibited a field-effect mobility of 18.3 cm2/V middots and minimum OFF-state current of 2.79 times 10-12A/mum at Vds= 5 V. The leakage currents are two orders of magnitude lower than those of a nonoffset TFT with mobility drop from 23.8 to 18.3 cm2/ Vmiddots.
Keywords :
elemental semiconductors; leakage currents; silicon; thin film transistors; Si; center-offset polycrystalline-silicon thin-film transistor; fabrication process; field-effect mobility; leakage current; minimum OFF-state current; n+ amorphous-silicon contacts; size 5 mum; thermal annealing; voltage 5 V; Annealing; Crystallization; Electrodes; Fabrication; Glass; Leakage current; Liquid crystal displays; Pixel; Silicon; Thin film transistors; ${rm n}^{+}$
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/LED.2008.2008448
Filename :
4729721
Link To Document :
