Author :
Son, Ho-Young ; Chung, Chang-Kyu ; Yim, Myung-Jin ; Hwang, Jin-Sang ; Paik, Kyung-Wook ; Jung, Gi-Jo ; Lee, Jun-Kyu
Abstract :
Recently, wafer-level packaging (WLP) has become one of the promising packaging technologies due to its advantages, such as fewer processing steps, lower cost, and enhanced device performance compared to conventional single-chip packaging. Many developments on new WLP design, material, and process have been accomplished according to performance and reliability requirement of the devices to be packaged [1], [2]. For a lower cost, higher performance, and environmentally green packaging process, anisotropic conductive film (ACF) flip chip assembly has been widely used, such as in ultrafine-pitch flat panel display (FPD) and general semiconductor packaging applications, too. However, there has been no previous attempt on the wafer-level flip chip assembly using ACFs. In this paper, wafer-level flip chip packages using preapplied ACFs were investigated. After ACF prelamination on an electroplated Au bumped wafer, and subsequent singulation, singulated chips were flip-chip assembled on an organic substrate using a thermocompression bonding method. Au-plated bumps were well assembled on Ni/Au pads of organic substrates. The electrical, mechanical properties and the reliabilities of wafer-level flip chip assemblies (WL-FC As) were evaluated and compared with conventional ACF flip chip assemblies using the thermocompression method. Contact resistance measurement was performed after thermal cycling, high temperature/humidity, and pressure cooker test. ACF joints between electroplated Au bumps and substrate metal pads showed stable contact resistance of 5 mOmega per a bump, strong bump adhesion, and similar reliability behaviors compared with conventional ACF flip chip joints using a thermocompression bonding. As a summary, new wafer-level packages using preapplied ACFs were successfully demonstrated for flip chip assembly. The new wafer-level packages using preapplied ACFs can be widely used for many nonsolder flip chip assembly applications such as chip-on-board (COB), chip-- on-flex (COF), and chip-on-glass (COG).
Keywords :
conducting materials; electroplating; flip-chip devices; gold; integrated circuit bonding; integrated circuit reliability; wafer level packaging; Au; anisotropic conductive film; contact resistance measurement; environmentally green packaging process; flip chip assembly; reliability; thermocompression method; wafer-level flip chip package; Anisotropic conductive films; Assembly; Contact resistance; Costs; Flip chip; Gold; Semiconductor device packaging; Substrates; Wafer bonding; Wafer scale integration; Anisotropic conductive film (ACF) prelamination; flip chip assembly; reliability; wafer-level flip chip packages; wafer-level package;