DocumentCode
1049286
Title
Implementation of a mask verification language and its compiler
Author
Brown, A.D. ; Thomas, P.R.
Author_Institution
Dept. of Electron., Southampton Univ., UK
Volume
137
Issue
3
fYear
1990
fDate
5/1/1990 12:00:00 AM
Firstpage
207
Lastpage
217
Abstract
The paper describes the design and philosophy of a mask verification language (MVL) and its compiler. Mask verification tools have to be programmable, because of the large software investment they require, and the speed at which fabrication technology changes. The language described allows a designer to specify the topological structure of a device (the device description), and to attach to it a procedure to be executed when that device is recognised (the device procedure). The device procedure allows certain geometric qualifications to be placed on the structure. (The device description and procedure, taken together, form a device declaration). In general, an MVL program will contain several device declarations: one for each realisable type of device of a technology. The description part of a declaration is asynchronous, and the procedural part, which is internally sequential, is executed once for each instance of the device description located on the mask set. Careful choice of the primitives provided allows extensive optimisation of the leaf operations involved, which is extremely important, given the usual size of the mask datasets.
Keywords
VLSI; circuit CAD; high level languages; program compilers; asynchronous; compiler; declaration; geometric qualifications; mask verification language; optimisation; topological structure;
fLanguage
English
Journal_Title
Computers and Digital Techniques, IEE Proceedings E
Publisher
iet
ISSN
0143-7062
Type
jour
Filename
50614
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