Fifth generation digital sonar signal processing

This paper discusses the evolutionary development, which has taken place over the last decade, in digital sonar systems architecture with the application of first, second, and third generation computers as system controllers for sonar systems. It is the opinion of the authors that, with the arrival of microprocessors, the system controller tasks in real time digital sonars will diminish. We present, as the "fourth generation," the present systems which still have a relatively large CPU, assisted by an array of microprocessors under their control for several subtasks which can be handled, more efficiently, locally in the systems. The "fifth generation" concept is postulated as a further development of this concept. A distributed processing scheme is presented in which the processing elements are actually highly functionally distributed themselves at the lowest level of architecture; consequently, the user views them as uniprocessors within the tightly coupled network. This approach should result in relatively high throughput utilizing a fairly small repertoire of modular hardware components and requiring minimal software effort by implementing, via firmware, very high level macros. This concept allows adaptive system architecture for the various advanced sonar data processing requirements for multielement linear, spatial, or blanket type array systems postulated for the future.