Interstage gain proration technique for digital-domain multi-step ADC calibration

The interstage gain proration technique greatly simplifies the task of digitally calibrating multi-step analog-to-digital converters (ADC´s) by reducing the number of error measurements and the memory size to store code errors. This technique also makes it feasible to move the calibration hardware into the digital domain, leaving only the switching function in the analog domain. Even though calibrating a multi-step ADC stage-by-stage gives rise to a range mismatch problem between stages, by digitally subtracting prorated interstage gain errors from the latter-stage code errors, the proposed technique corrects nonlinearities resulting from these inaccurate interstage gains. Simulated ADC examples based on a capacitor-array (C-array) multiplying digital-to-analog converter (MDAC) demonstrate a substantial saving in the number of code-error measurements. For example, when calibrating two stages of n ₁ and n₂ bits each, the resulting number of code-error measurements is given in comparison to the straightforward single-stage calibration