Title :
A new course on supercomputers and parallel architectures
Author :
Narasimhan, V. Lakshmi
Author_Institution :
Dept. of Electr. & Comput. Eng., Queensland Univ., St. Lucia, Qld., Australia
fDate :
11/1/1995 12:00:00 AM
Abstract :
Parallel processing and distributed computing are two areas attracting a great deal of attention. Several universities and institutions are involved in the teaching of courses on parallel programming, distributed operating systems and parallel algorithms, but very few of them offer a course from the hardware point of view. The course structure presented in this paper gives a considerable emphasis on the hardware for parallel processing. Various topics such as the design of high speed computing devices, hardware design of multiple pipelines, design of a variety of memory configurations, design of an NXN interconnection network and the hardware for systolic architectures and neural network architectures are presented in this course. Students have the opportunity to actually design a distributed shared memory system using IBM PC machines and write software for them. The assignments for the course are in the form of both individual and group projects on the implementation of various schemes for parallel processing such as synchronization mechanisms (e.g., locks and barrier) in hardware. In addition, a group project deals with the design of a pipelined floating point unit. Further, a complementary course on VLSI provides the necessary skills for the students to implement the devices as a VLSI chip. Students also have the opportunity to do hands on work with transputers and develop hardware and software based around them. This course has received good feedback both from academia and industries within Australia
Keywords :
computer science education; educational courses; parallel architectures; Australia; IBM PC machines; NXN interconnection network design; VLSI course; distributed computing; distributed shared memory system; group project; hardware design; high speed computing devices; individual projects; memory configurations; multiple pipelines design; neural network architectures; parallel architectures course; parallel processing; pipelined floating point unit; supercomputers course; synchronization mechanisms; systolic architectures hardware; teaching; transputers; Computer architecture; Distributed computing; Education; Educational institutions; Neural network hardware; Parallel architectures; Parallel processing; Parallel programming; Supercomputers; Very large scale integration;
Journal_Title :
Education, IEEE Transactions on