DocumentCode
1051001
Title
Evolution of fault-tolerant and noise-robust digital designs
Author
Hartmann, M. ; Haddow, P.C.
Author_Institution
Dept. of Comput. & Inf. Sci., Norwegian Univ. of Sci. & Technol., Trondheim, Norway
Volume
151
Issue
4
fYear
2004
fDate
7/18/2004 12:00:00 AM
Firstpage
287
Lastpage
294
Abstract
Artificial evolution has been shown to generate remarkable systems of exciting novelty. It is able to automatically generate digital circuit designs and even circuits that are robust to noise and faults. Extensive experiments have been carried out and are presented here to identify more clearly to what extent artificial evolution is able to generate robust designs. The evolved circuits are thoroughly tested whilst being exposed to noise and faults in a simulated environment and the results of their performance are presented. The evolved multiplier and adder circuits show a graceful degradation as noise and failrate are increased. The functionality of all circuits is measured in a simulated environment that to some extent takes into account analogue electronic properties. Also included is a short overview of some recent work illustrating the robustness and tolerance of bio-inspired hardware systems.
Keywords
computer architecture; data compression; evolutionary computation; fault tolerance; hardware-software codesign; image coding; bi-level images; context switchable inference processor; design automation; evolutionary algorithm; evolvable hardware; fault-tolerant digital designs; fuzzy inference processor; lossless compression; noise-robust digital designs; very high resolution images;
fLanguage
English
Journal_Title
Computers and Digital Techniques, IEE Proceedings -
Publisher
iet
ISSN
1350-2387
Type
jour
DOI
10.1049/ip-cdt:20040014
Filename
1318863
Link To Document