DocumentCode :
1051314
Title :
3 V MOS current conveyor cell for VLSI technology
Author :
Toumazou, Christofer
Volume :
29
Issue :
3
fYear :
1993
Firstpage :
317
Lastpage :
318
Abstract :
An MOS current conveyor design suitable for VLSI implementation is described. It uses a new circuit architecture which allows for low supply voltage operation at 3 V enhancing its application versatility as a standard cell in VLSI analogue IC design as well as in mixed-mode IC design.
Keywords :
MOS integrated circuits; VLSI; cellular arrays; mixed analogue-digital integrated circuits; 3 V; MOS current conveyor; VLSI technology; analogue IC design; circuit architecture; low supply voltage operation; mixed-mode IC design; standard cell;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:19930216
Filename :
277195
Link To Document :
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