A 32 kbyte, 200 ns read-write cycle magnetic film memory system

A 32 kbyte, 60 ns access time, 200 ns read/write cycle time, low cost (≤ 0.8¢ bit) planar magnetic film memory system is described. High-density (3500 bit/in.²), destructive read-out (DRO), coupled hard axis (CHA) magnetic film storage device arrays (integration level: 40 000 bits per 4.1 × 4.3 inch substrate) are batch fabricated by thin film deposition and photolithographic techniques. Monolithic integrated drive and sense circuits interface with emitter coupled logic (ECL) circuits and provide within one silicon chip the transition from stack transmission lines to logic levels. The memory is internally organized as 4096 word by 72 bit system. Compatible electronic packaging assembly and interconnection techniques are described. Cost considerations and extensions of the technology are discussed.