DocumentCode
1052903
Title
Deterministic built-in self-test using split linear feedback shift register reseeding for low-power testing
Author
Yang, M.-H. ; Kim, Y. ; Park, Y. ; Lee, D. ; Kang, S.
Author_Institution
Yonsei Univ., Seoul
Volume
1
Issue
4
fYear
2007
fDate
7/1/2007 12:00:00 AM
Firstpage
369
Lastpage
376
Abstract
A new low-power testing methodology to reduce the excessive power dissipation associated with scan-based designs in the deterministic test pattern generated by linear feedback shift registers (LFSRs) in built-in self-test is proposed. This new method utilises two split LFSRs to reduce the amount of the switching activity. The original test cubes are partitioned into zero-set and one-set cubes according to specified bits in the test cubes, and the split LFSR generates a zero-set or one-set cube in the given test cube. In cases where the current scan shifting value is a do not care bit accounting for the output values of the LFSRs, the last value shifted into the scan chain is repeatedly shifted into the scan chain and no transition is produced. Experimental results for the largest ISCAS´89 benchmark circuits show that the proposed scheme can reduce the switching activity by 50% with little hardware overhead compared with previous schemes.
Keywords
automatic test pattern generation; built-in self test; low-power electronics; shift registers; deterministic built-in self-test; deterministic test pattern; low-power testing; power dissipation; scan-based designs; split linear feedback shift register reseeding;
fLanguage
English
Journal_Title
Computers & Digital Techniques, IET
Publisher
iet
ISSN
1751-8601
Type
jour
DOI
10.1049/iet-cdt:20060114
Filename
4271380
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