• DocumentCode
    10531
  • Title

    Corrections to “Area-Efficient Low-Noise Low-Spur Architecture for an Analog PLL Working From a Low Frequency Reference” [Jun 12 331-335]

  • Author

    Pu, Xumin ; Kumar, Ajit ; Nagaraj, Kanthi

  • Volume
    61
  • Issue
    8
  • fYear
    2014
  • fDate
    Aug. 2014
  • Firstpage
    639
  • Lastpage
    639
  • Abstract
    In the above-named article [ibid., vol. 59, no. 6, pp. 331-335, Jun. 2012], two equations were omitted, and one equation was misplaced during proofing. The correct equations for the second paragraph of Section I (page 331) and in the first paragraph of Section II (page 332) are provided. It is then shown that, with this loop filter, the 3-dB frequency and damping factor for the phase-locked loop are given by another equation that was misplaced during article proofing.
  • Keywords
    Analog circuits; CMOS digital integrated circuits; Phase locked loops; Phase noise; Resistors;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems II: Express Briefs, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1549-7747
  • Type

    jour

  • DOI
    10.1109/TCSII.2014.2336414
  • Filename
    6870692