DocumentCode :
105325
Title :
Direct Period Synthesis for Achieving Sub-PPM Frequency Resolution Through Time Average Frequency: The Principle, The Experimental Demonstration, and Its Application in Digital Communication
Author :
Liming Xiu
Author_Institution :
Rayway Int., LLC, Carrollton, TX, USA
Volume :
23
Issue :
7
fYear :
2015
fDate :
Jul-15
Firstpage :
1335
Lastpage :
1344
Abstract :
Direct period synthesis is a technique of using a base time unit and the time-average-frequency concept to synthesize clock frequency. Its distinguished capabilities include generating frequencies in very fine step and switching frequency in very fast speed. In this paper, the principle of fine frequency generation is presented. Using data collected from two 55-nm CMOS chips, experimental evidence of sub-ppm (0.04 ppm at finest) frequency resolution at 27 MHz, 1.5 GHz, and 2.4 GHz is provided. This feature of fine frequency resolution is very important in digital communication, especially for plesiochronous and heterochronous systems. It is a circuit level enabler for system level innovation. In the last part of this paper, several important applications of using these capabilities are explored.
Keywords :
CMOS integrated circuits; clocks; digital communication; frequency synthesizers; CMOS chip; base time unit; circuit level enabler; clock frequency synthesis; digital communication; direct period synthesis; frequency 1.5 GHz; frequency 2.4 GHz; frequency 27 MHz; frequency generation; frequency resolution; heterochronous system; plesiochronous system; size 55 nm; subPPM frequency resolution; switching frequency; system level innovation; time average frequency; Clocks; Frequency synthesizers; Jitter; Phase locked loops; Phase noise; Time-frequency analysis; Voltage-controlled oscillators; Clock generation; digital communication; flying-adder (FA); frequency resolution; frequency synthesis; network synchronization; phase-locked loop (PLL); time-average-frequency (TAF);
fLanguage :
English
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1063-8210
Type :
jour
DOI :
10.1109/TVLSI.2014.2334591
Filename :
6862058
Link To Document :
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