Title :
Implementation of a new MPEG-2 transport stream processor for digital television broadcasting
Author :
Longfei, Liang ; Songyu, Yu ; Xingdong, Wang
Author_Institution :
Inst. of Image Commun. & Inf. Process., Shanghai Jiaotong Univ., China
fDate :
12/1/2002 12:00:00 AM
Abstract :
We introduce a real-time, dual independent output MPEG-2 transport stream (TS) processor designed specific for the China HDTV testing zones. The processor is a single piece of equipment, of which the core functions are realized in FPGA and DSP. Key technologies include a program clock reference (PCR) correction and a packets controller, which are important for TS processing, are described in detail. An improved PCR correction scheme developed by the authors is also proposed.
Keywords :
code standards; data compression; digital signal processing chips; digital television; field programmable gate arrays; high definition television; telecommunication standards; television broadcasting; video coding; China; DSP; FPGA; HDTV testing; MPEG-2 standard; PCR correction; digital television broadcasting; dual independent output processor; packet controller; program clock reference correction; real-time MPEG-2 transport stream processor; Automatic testing; Bit rate; Clocks; Decoding; Digital TV; Digital signal processing; Field programmable gate arrays; HDTV; System testing; TV broadcasting;
Journal_Title :
Broadcasting, IEEE Transactions on
DOI :
10.1109/TBC.2002.806799
