• DocumentCode
    1054101
  • Title

    Voltage Regulator Optimization Using Multiwinding Coupled Inductors and Extended Duty Ratio Mechanisms

  • Author

    Oraw, Bradley S. ; Ayyanar, Rajapandian

  • Author_Institution
    Dept. of Electr. Eng., Arizona State Univ., Tempe, AZ
  • Volume
    24
  • Issue
    6
  • fYear
    2009
  • fDate
    6/1/2009 12:00:00 AM
  • Firstpage
    1494
  • Lastpage
    1505
  • Abstract
    This paper examines design optimization of voltage regulators (VRs) for microprocessor applications. Optimality of competing VR topologies, such as conventional (Conv) buck, coupled inductor, and extended duty ratio converters, is examined using efficiency norms and a new cost-per-watt metric to compare the amount of output capacitance (which is strongly correlated to the VR cost) to the efficiency. Coupled inductors provide a higher steady-state inductance than transient inductance. Lower transient inductance allows for smaller output capacitance. However, lower output capacitance requires a higher switching frequency and thus yields greater switching losses and lower efficiency. Extended duty ratio mechanisms reduce the switching voltage, and hence, reduce switching losses and increase efficiency. Experimental data are provided that the coupled inductor extended duty ratio converter has the same average efficiency, has higher light-load efficiency, and uses one-third of the output capacitance as the Conv multiphase buck converter. Hence, the combination of multiwinding coupled inductors and extended duty ratio mechanisms is shown to be the optimal VR configuration. The optimality concepts contributed in this paper resolve the ambiguity between VR cost and efficiency, and are essential for selecting the best solution among several competing VR designs.
  • Keywords
    inductors; switching convertors; voltage regulators; cost-per-watt metric method; extended duty ratio converter; light-load efficiency; multiwinding coupled inductor; steady-state inductance; switching frequency; switching loss reduction; voltage regulator optimization; Capacitance; Cost function; Design optimization; Inductance; Inductors; Microprocessors; Regulators; Switching loss; Virtual reality; Voltage; Coupled inductors; dc–dc converters; extended duty ratio mechanism; optimization methods; voltage regulators;
  • fLanguage
    English
  • Journal_Title
    Power Electronics, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0885-8993
  • Type

    jour

  • DOI
    10.1109/TPEL.2009.2013223
  • Filename
    5062425