DocumentCode :
1054301
Title :
Enhanced capacitor for one-transistor memory cell
Author :
Sodini, Charles G. ; Kamins, Theodore I.
Author_Institution :
Hewlett-Packard Laboratories, Palo Alto, CA
Volume :
23
Issue :
10
fYear :
1976
fDate :
10/1/1976 12:00:00 AM
Firstpage :
1187
Lastpage :
1189
Abstract :
Ion implantation has been used to increase the depletion-layer capacitance beneath the inversion layer of an MOS capacitor in order to enhance the charge storage per unit area. Boron and arsenic implants were used to increase the depletion-layer capacitance, approximately halving the area required for a given charge storage.
Keywords :
Boron; Capacitance; Conductors; Electron devices; Implants; Light emitting diodes; MOS capacitors; Protection; Silicon; Voltage;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/T-ED.1976.18569
Filename :
1478582
Link To Document :
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