• DocumentCode
    1054771
  • Title

    Goal-oriented decomposition of switching functions

  • Author

    Diaz-Olavarrieta, L. ; Illanko, K. ; Zaky, S.G.

  • Author_Institution
    Dept. of Electr. Eng., Toronto Univ., Ont., Canada
  • Volume
    12
  • Issue
    5
  • fYear
    1993
  • fDate
    5/1/1993 12:00:00 AM
  • Firstpage
    655
  • Lastpage
    665
  • Abstract
    A method for decomposing combinational functions for the purpose of obtaining a multilevel synthesis is proposed. A cascade of mapping stages is used to transform the function being synthesized into a simple one called the goal function. The goal function-usually a one-variable function-is selected at the outset and then used to guide the definition of the transformations to be implemented by the mapping stages. The resulting circuits are comparable in size to those derived from minimal prime-implicant covers. However, goal-oriented synthesis is faster, yields circuits that are easier to test, and offers more flexibility in the choice of gates
  • Keywords
    combinatorial switching; logic CAD; minimisation of switching nets; switching functions; combinational functions; goal function; goal oriented decomposition; goal-oriented synthesis; mapping stages cascade; multilevel synthesis; one-variable function; transformations; Circuit synthesis; Circuit testing; Cost accounting; Councils; Delay; Helium; Input variables; Logic functions; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/43.277610
  • Filename
    277610