DocumentCode :
1054865
Title :
Divergence and scheduling in functional level concurrent fault simulation
Author :
Song, Ohyoung Y. ; Park, Bong-Hee ; Menon, P.R.
Author_Institution :
Dept. of Electr. & Comput. Eng., Massachusetts Univ., Amherst, MA, USA
Volume :
12
Issue :
5
fYear :
1993
fDate :
5/1/1993 12:00:00 AM
Firstpage :
734
Lastpage :
736
Abstract :
Two important components of the concurrent simulation algorithm are divergence and scheduling. The effects of timing specifications in functional modules on divergence and scheduling are examined, and an efficient method for performing these operations is proposed
Keywords :
circuit analysis computing; digital simulation; scheduling; concurrent fault simulation; concurrent simulation algorithm; divergence; functional level; scheduling; timing specifications; Circuit faults; Circuit simulation; Computational modeling; Convergence; Delay effects; Integrated circuit interconnections; Logic; Processor scheduling; Signal processing; Timing;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/43.277619
Filename :
277619
Link To Document :
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