DocumentCode :
1055209
Title :
A 52 
W Wake-Up Receiver With 
72 dBm Sensitivity Using an Uncertain-IF Architecture
Author :
Pletcher, Nathan M. ; Gambini, Simone ; Rabaey, Jan
Author_Institution :
Qualcomm Inc., San Diego, CA
Volume :
44
Issue :
1
fYear :
2009
Firstpage :
269
Lastpage :
280
Abstract :
A dedicated wake-up receiver may be used in wireless sensor nodes to control duty cycle and reduce network latency. However, its power dissipation must be extremely low to minimize the power consumption of the overall link. This paper describes the design of a 2 GHz receiver using a novel ldquouncertain-IFrdquo architecture, which combines MEMS-based high-Q filtering and a free-running CMOS ring oscillator as the RF LO. The receiver prototype, implemented in 90 nm CMOS technology, achieves a sensitivity of -72 dBm at 100 kbps (10-3 bit error rate) while consuming just 52 muW from the 0.5 V supply.
Keywords :
CMOS integrated circuits; UHF filters; UHF integrated circuits; UHF oscillators; micromechanical devices; radio receivers; wireless sensor networks; CMOS technology; MEMS-based high-Q filtering; bit rate 100 kbit/s; duty cycle control; free-running CMOS ring oscillator; frequency 2 GHz; power 52 muW; power dissipation; size 90 nm; uncertain-IF architecture; voltage 0.5 V; wireless sensor node; Bit error rate; CMOS technology; Delay; Energy consumption; Filtering; Power dissipation; Prototypes; Radio frequency; Ring oscillators; Wireless sensor networks; BAW resonator; sensor networks; ultra-low power; wake-up receiver;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.2008.2007438
Filename :
4735562
Link To Document :
