Title :
Improvements of deposited interpolysilicon dielectric characteristics with RTP N/sub 2/O-anneal
Author :
Klootwijk, H. ; Weusthof, M.H.H. ; Van Kranenburg, H. ; Woerlee, P.H. ; Wallinga, H.
Author_Institution :
MESA Res. Inst., Twente Univ., Enschede, Netherlands
fDate :
7/1/1996 12:00:00 AM
Abstract :
Nitridation of deposited instead of thermally grown oxides was studied to form high-quality inter-polysilicon dielectric layers for nonvolatile memories. It was found that by optimizing the texture and morphology of the polysilicon layers, and by optimizing the post-dielectric deposition-anneal, very high-quality dielectric layers can be obtained. In this paper, it is shown that not only for deposited gate oxides, but also for deposited inter-polysilicon oxides, rapid thermal annealing leads to previously unpublished improved electrical characteristics, like high charge to breakdown (Q/sub bd//spl ap/20 C/cm/sup 2/) and lower leakage currents. Moreover, the annealed dielectrics had less electron trapping when stressed.
Keywords :
dielectric thin films; electric breakdown; electron traps; integrated circuit technology; integrated memory circuits; leakage currents; nitridation; rapid thermal annealing; semiconductor-insulator boundaries; N/sub 2/O; RTP N/sub 2/O-anneal; Si-SiNO; annealed dielectrics; deposited interpolysilicon dielectric characteristics; deposited oxides; electron trapping reduction; gate oxides; high charge to breakdown; leakage currents reduction; morphology optimisation; nonvolatile memories; post-dielectric deposition-anneal; rapid thermal annealing; texture optimisation; Design for quality; Dielectrics; Electric variables; Lead compounds; Leakage current; Nonvolatile memory; Rapid thermal annealing; Silicon; Tunneling; Voltage;
Journal_Title :
Electron Device Letters, IEEE