36-GHz, 16× 6-Bit ROM in InP DHBT Technology Suitable for DDS Application

Author

Manandhar, Sanjeev ; Turner, Steven Eugene ; Kotecki, David E.

Author_Institution

Dept. of Electr. & Comput. Eng., Maine Univ., Orono, ME

Volume

42

Issue

2

fYear

2007

Firstpage

451

Lastpage

456

Abstract

A 16times6-bit read-only memory (ROM), employing an architecture suitable for use as a phase to amplitude converter for direct digital synthesizers (DDS), has been implemented in InP double heterojunction bipolar transistor (DHBT) technology. The ROM uses a -3.8 V power supply and dissipates 1.13 W of power. The ROM is implemented in a test circuit that includes an 8-bit accumulator and a 6-bit digital-to-analog converter (DAC) to facilitate demonstration of high-speed operation. The maximum operating clock frequency is measured to be 36 GHz

Keywords

III-V semiconductors; direct digital synthesis; heterojunction bipolar transistors; indium compounds; read-only storage; -3.8 V; 1.13 W; 16 bit; 36 GHz; 6 bit; DDS application; DHBT technology; bipolar ROM; decoder; digital-to-analog converter; direct digital synthesizers; double heterojunction bipolar transistor technology; high-speed integrated circuits; phase to amplitude converter; read-only memory; Circuit testing; Clocks; DH-HEMTs; Digital-analog conversion; Double heterojunction bipolar transistors; Frequency; Indium phosphide; Power supplies; Read only memory; Synthesizers; Accumulator; bipolar ROM; decoder; heterojunction bipolar transistor (HBT); high-speed integrated circuits; indium phosphide (InP);

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.2006.889361

Filename

4077166