DocumentCode :
1056327
Title :
A Low-Power Floating-Gate-MOS-Based CDMA Matched Filter Featuring Coupling Capacitor Disconnection
Author :
Yamasaki, Toshihiko ; Shibata, Tadashi
Author_Institution :
Dept. of Inf. & Commun. Eng., Univ. of Tokyo
Volume :
42
Issue :
2
fYear :
2007
Firstpage :
422
Lastpage :
430
Abstract :
A low-power and compact CDMA matched filter has been developed based on the floating-gate MOS technology. The low-power operation has been achieved by employing single-step matching and disconnection of coupling-capacitors not involved in each matching operation. The capacitance disconnection has also enhanced the output gain to almost double. The 255-chip matched filter fabricated in a 0.35-mum CMOS technology demonstrated 5.3-mW operation at 2.5-V power supply and the chip rate of 8 Mchip/s, while occupying a chip area of 1.0 mm2
Keywords :
CMOS analogue integrated circuits; capacitors; code division multiple access; filters; low-power electronics; 0.35 micron; 2.5 V; 5.3 mW; CMOS technology; capacitance disconnection; code division multiple access; coupling capacitor disconnection; floating-gate-MOS-based CDMA matched filter; neuron MOS; single-step matching; CMOS technology; Capacitors; Circuits; Matched filters; Modulation coding; Multiaccess communication; Neurons; Phase modulation; RF signals; Voltage; CDMA; floating-gate MOS; matched filter; neuron MOS;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.2006.889363
Filename :
4077180
Link To Document :
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