DocumentCode
1056527
Title
DIFMOS—A floating-gate electrically erasable nonvolatile semiconductor memory technology
Author
Gosney, W. Milton
Author_Institution
Texas Instruments, Inc., Dallas, TX
Volume
24
Issue
5
fYear
1977
fDate
5/1/1977 12:00:00 AM
Firstpage
594
Lastpage
599
Abstract
Electrically alterable read-only memories (EAROM´s) or reprogrammable read-only memories (RPROM´s) can be fabricated using a single-level metal-gate p-channel MOS technology with all conventional processing steps. Given the acronym DIFMOS for dual-injector floating-gate MOS, this technology utilizes the floating-gate technique for nonvolatile storage of data. Avalanche injection of hot electrons through gate oxide from a special injector diode in each bit is used to charge the floating gates. A second injector structure included in each bit permits discharge of the floating gate by avalanche injection of holes through gate oxide. The overall design of the DIFMOS bit is dictated by the physical considerations required for each of the avalanche injector types. The end result is a circuit technology which can provide fully decoded bit-erasable EAROM-type circuits using conventional manufacturing techniques.
Keywords
Charge carrier processes; Circuits; Electrons; Nonvolatile memory; PROM; Read only memory; Semiconductor device manufacture; Semiconductor diodes; Semiconductor memory; Threshold voltage;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/T-ED.1977.18786
Filename
1478978
Link To Document