Abstract :
Digital logic networks, such as OR, AND, NOT (inverters) EXCLUSIVE OR, NAND, and NOR, are developed using charge coupled devices. Operations such as digital addition; multiplication, subtraction and bit refresh are also developed by the implementation of the CCD 3-input, 2-input, and 4-input adder. Equations which will determine the responsiveness (gain) of the charge sensing amplifier are also developed. Very good correlation was obtained between experimental and theoretical characteristics of the 2-input adder, the CCD digital logic networks and the responsiveness of the charge sensing amplifier.
