A third-order sigma-delta modulator with extended dynamic range

Oversampling modulators based on high-order sigma-delta modulation provide an effective means of achieving high-resolution analog-to-digital conversion in VLSI technology. Because high-order noise shaping greatly reduces the quantization noise in the signal band, the dynamic range of these modulators tends to be bounded by the thermal noise of the input stage and the maximum voltage swing in the signal path. This paper introduces a third-order cascaded sigma-delta modulator that uses a modified cascaded architecture and reduced gain in the first integrator to increase the dynamic range. An experimental modulator fabricated in a 1-μm CMOS technology attains a resolution of 17 b for a 25-kHz signal bandwidth while operating from a single 5-V supply. With an oversampling ratio of 128 and a clock frequency of 6.4 MHz, the modulator achieves a 104-dB dynamic range and a peak signal-to-noise+distortion ratio (SNDR) of 98 dB. As indicated by both measurements and simulations, the cascaded architecture also greatly reduces the discrete noise peaks that can be present in a single-stage architecture