Title :
An outline font rendering processor with an embedded RISC CPU for high-speed hint processing
Author :
Kawata, Tetsuro ; Kawauchi, Kenichi ; Miyakawa, Nobuaki ; Kawazome, Ichiro ; Yasumatsu, Hiromi ; Haga, Susumu ; Takenaka, Masaya
Author_Institution :
Electron. Imaging & Devices Res. Lab., Fuji Xerox Co. Ltd., Kanagawa, Japan
fDate :
3/1/1994 12:00:00 AM
Abstract :
Font rendering requires state-of-the-art hint processing for delicate adjustment to output devices in practical applications. The hint processing is a function which corrects transformed outlines using additional information. A font rendering processor has been developed using a CMOS 0.8 μm pg process on a 9.47×9.24 mm2 die. It incorporates the hint processing capability, and thus unburdens a host CPU of the whole font rendering. It comprises a RISC CPU for high-speed hint processing and special hardware units that is based upon a DDA and an edge flag algorithm for outline drawing and filling. A performance evaluation using the fabricated chip has shown about 0.4 ms/char and 1.5 ms/char rendering capability for small size alphabets and Kanjis, respectively. It equals about 7-11 times performance compared to a Sparc Station 2, and from about 22-38 times performance compared to a Sun4/110
Keywords :
CMOS integrated circuits; VLSI; character sets; computer graphic equipment; microprocessor chips; performance evaluation; reduced instruction set computing; rendering (computer graphics); 0.8 micron; CMOS process; DDA; Kanji; edge flag algorithm; embedded RISC CPU; high-speed hint processing; outline drawing; outline filling; outline font rendering processor; performance evaluation; small size alphabets; Acceleration; CMOS process; Computer displays; Filling; Hardware; Printers; Reduced instruction set computing; Rendering (computer graphics); System performance; Very large scale integration;
Journal_Title :
Solid-State Circuits, IEEE Journal of
