DocumentCode
1058239
Title
Design and Multiplierless Realization of Digital Synthesis Filters for Hybrid-Filter-Bank A/D Converters
Author
Zhao, S.H. ; Chan, S.C.
Author_Institution
Dept. of Electr. & Electron. Eng., Univ. of Hong Kong, Kowloon, China
Volume
56
Issue
10
fYear
2009
Firstpage
2221
Lastpage
2233
Abstract
This paper studies the optimal least squares and minimax design and realization of digital synthesis filters for hybrid-filter-bank analog-to-digital converters (HFB ADCs) to meet a given spurious-free dynamic range (SFDR). The problem for designing finite-impulse-response synthesis filters is formulated as a second-order cone-programming problem, which is convex and allows linear and quadratic constraints such as peak aliasing error to be incorporated. The fixed coefficients of the designed synthesis filters are efficiently implemented using sum-of-power-of-two (SOPOT) coefficients, while the internal word length used for each intermediate data is minimized using geometric programming. The main sources of error are analyzed, and a new formula of SFDR in terms of these errors is derived. The effects of component variations of analog analysis filters on the HFB ADC are also addressed by means of two new robust HFB ADC design algorithms based on stochastic uncertainty and worst case uncertainty models. Design results show that the proposed approach offers more flexibility and better performance than conventional methods in achieving a given SFDR and that the robust design algorithms are more robust to parameter uncertainties than the nominal design in which the uncertainties are not taken into account.
Keywords
FIR filters; analogue-digital conversion; analog analysis filters; analog-to-digital converters; digital synthesis filters; finite-impulse-response synthesis filters; hybrid-filter-bank A-D converters; linear constraints; multiplierless realization; parameter uncertainties; peak aliasing error; quadratic constraints; spurious-free dynamic range; sum-of-power-of-two coefficients; Analog-to-digital converters (ADCs); hybrid filter bank (HFB); multiplierless realization; parameter uncertainty; second-order cone programming (SOCP); synthesis filter design;
fLanguage
English
Journal_Title
Circuits and Systems I: Regular Papers, IEEE Transactions on
Publisher
ieee
ISSN
1549-8328
Type
jour
DOI
10.1109/TCSI.2008.2012213
Filename
4738415
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