Innovative structures for CMOS combinational gates synthesis

Design of multiple outputs CMOS combinational gates is studied. Two techniques for minimization of multiple output functions at the switching level are introduced. These techniques are based on innovative transistor interconnection structures named Delta and Lambda networks. The two techniques can be combined together to obtain further area reductions. Different synthesis algorithms are discussed, from exhaustive enumeration to branch and bound to heuristic techniques allowing to speed up the synthesis process. Simulation results for synthesis are introduced to compare the different algorithms. Design examples are also provided. Electrical simulations show that the dynamic behavior of such structures is comparable to the traditional static or domino implementations (obviously the new and traditional structures have the same static behavior)