• DocumentCode
    1058725
  • Title

    The planar junction etch for high voltage and low surface fields in planar devices

  • Author

    Temple, Victor A K ; Baliga, Bayant Jayant ; Adler, Michael S.

  • Author_Institution
    General Electric Company, Schenectady, NY
  • Volume
    24
  • Issue
    11
  • fYear
    1977
  • fDate
    11/1/1977 12:00:00 AM
  • Firstpage
    1304
  • Lastpage
    1310
  • Abstract
    A modification of the moat etch type of surface contouring is described which can increase the avalanche breakdown voltage of planar p-n junctions and greatly reduce peak surface electric fields. A properly located moat etch or bevel is used to achieve what is effectively a positive bevel intersection angle between the junction and the surface. Qualitative arguments based on charge balance, exact computer solutions, and experimental results show that higher breakdown voltage and much lower surface fields can be achieved as some, but not all, of the deleterious effects of the junction curvature are eliminated. Optimum design and sensitivity to process variations are also considered.
  • Keywords
    Avalanche breakdown; Breakdown voltage; Etching; Geometry; Low voltage; P-n junctions; Passivation; Research and development; Terminology;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/T-ED.1977.19002
  • Filename
    1479194